PRADIPTA SARKAR

Assistant Professor

About

Email	pradipta.sarkar@bcrec.ac.in
Date of birth	1986-04-04
Date of joining	2016-01-12
Department	Electronics and Communication Engineering
Address	Bijoy Apartment, Saptarshi Park, Durgapur- 713206.
Vidwan ID	184921
About Me
Specialization / Research Interest	Digital VLSI Design, Embedded Systems Design.

Qualifications

Educational Qualifications

Master of Technology (M.Tech)
National Institute of Technology Durgapur - 2011
Bachelor of Technology (B.Tech)
West Bengal University of Technology - 2009

Examination Cleared

GATE

Other Examination Cleared

GATE (2009) Electronics & Communication Engg , NET-UGC (2018) in Electronic Science, SET-WB (2018) in Electronic Science

Teaching and R & D experience

Teaching	Research	Industry
8 years 7 months	1 year 7 months	1 year 7 months

Teaching:

7 years 7 months in Dr. B.C. Roy Engineering College, Durgapur.

1 year in NIST, Berhampur.

Industry:

1 year 7 Months in Wipro Technologies.

VLSI Design, Embedded Systems, Digital Signal Processing, Digital Image Processing, Computer Networks.

Digital VLSI Design, Embedded Systems Design.

Activities

Area of Interest

Digital VLSI Design, Embedded Systems Design.

Expertise

Verilog HDL, VHDL, Xilinx Vivado, FPGA Programming. RTL Design, RTL Verification, RTL Synthesis, RTL Implementation in FPGA. Microcontroller Programming, Embedded C, Assembly, Keil Compiler. C, C++, Python, Matlab, PSpice, Linux (Ubuntu).

Publications

Journal

Date	Title	Journal	DOI	Link
28-04-2025	Two dimensional chaotic scheme for image encryption in FPGA	Analog Integrated Circuits and Signal Processing	DOI	View

Conference

Date	Title	Conference	DOI	Link
29-05-2023	One Dimensional Chaotic map Implementation in FPGA board for Image Encryption	IEEE Devices for Integrated Circuit (DevIC) 2023	DOI	View
13-02-2025	Chaotic Image encryption scheme implemented in FPGA for security enhance	IEEE Electron Devices Kolkata Conference (EDKCON) 2024	DOI	View
13-02-2025	Novel Sign-Magnitude Binary to Balanced-Ternary Encoder on Basys3 Artix7 FPGA	IEEE Electron Devices Kolkata Conference (EDKCON) 2024	DOI	View

Participations

Faculty Development Programmes

Start Date	End Date	Title	Organizer
15-07-2024	15-10-2024	VLSI Design Flow: RTL to GDS	NPTEL (IIIT DELHI)
15-07-2024	15-09-2024	System Design Through Verilog	NPTEL (IIT GUWAHATI)
15-07-2024	15-09-2024	Research Methodology	NPTEL (IIT MADRAS)
15-07-2022	15-09-2022	Hardware Modelling Using Verilog	NPTEL (IIT KHARAGPUR)
15-01-2025	15-04-2025	Design and Analysis of VLSI Subsystems	NPTEL - IIIT BANGALORE
15-01-2025	16-03-2025	CMOS Digital VLSI Design	NPTEL - IIT ROORKEE
15-01-2025	14-02-2025	Python for Data Science	NPTEL - IIT MADRAS

Participation In Administrative Committees

SL. No.	Post	Committee	Year
1	Placement Coordinator of Electronics & Communication Engg. Dept.	Training & Placement Cell	Since August, 2018 (Till Date)

Highlights

Faculty-Details